The present invention relates to a wiring substrate using multilayer wiring and a module including an LSI mounted on the wiring substrate, and more particularly, to a method and apparatus of fabricating electric circuit pattern on a multilayer wiring substrate in the thick and thin hybrid process in which the pattern is fabricated with high density and the fabrication is made with high reliability and high yield.
The technique of mounting LSI chips on one ceramic wiring substrate is growing to be a mainstream mounting technique in a high-speed large-scale digital system such as a large-scale computer or the like. Further, the technical progress of the multilayer wiring substrate used in this technique is remarkable.
A thick film wiring substrate is now fabricated using ceramics or glass ceramics as insulation layers and tungsten or molybdenum as wiring conductors by the green sheet process, for example, and a thin film wiring portion is then formed on an upper surface of the thick film wiring substrate using a mask. Thus, the wiring pattern is fixed as a standard pattern. Such a thick and thin film hybrid multilayer substrate is studied enthusiastically. One problem in the thick and thin film hybrid multilayer substrate resides in that the shrinkage by sintering in the fabrication process of the thick film wiring substrate is largely dispersed. Consequently, there occurs a positional deviation between a position on the thick film wiring substrate varied by the shrinkage and a standard pattern position in the thin film wiring portion and a bad connection is formed.
Incidentally, in the present state, the minimum dimensional tolerance from the center of the thick film wiring substrate to the periphery thereof which can be suppressed is about .+-.0.5%. Accordingly, when a distance from the center of the thick film wiring substrate to the periphery thereof is 50 mm, the maximum positional deviation is .+-.250 .mu.m.
One prior art technique (Japanese Patent Application JP-A-58-73193) for solving the bad connection due to the dispersion of the shrinkage of the thick film wiring substrate is described with reference to FIG. 2, in which a multilayer substrate (thick film wiring substrate) 1 of alumina includes ground and power layers 2 made of tungsten sinter and via portions (thick film wiring terminals) 3. The via portion 3 is formed by embedding a tungsten paste into a via-hole formed in an alumina insulation layer 4 and the diameter of the via portion 3 is set to a large diameter in consideration of the dispersion of the shrinkage of the thick film wiring substrate 1 in advance. For example, when the dimension of the substrate is 50 mm, it is 250 .mu.m or more. Further, reference numeral 5 denotes an insulation layer made of polyimide resin. For the purpose thereof, coated prepolymer solution is heat-cured to form polyimide perfectly. Then, the via-hole is formed by means of a photolithographic process using a resist. Further, a wiring 6 is formed on the via-hole and the insulation layer 5. The insulation layers 5 and the wirings 6 are formed alternately so that a thin film wiring portion 7 is formed. In this thick and thin film hybrid wiring substrate, the positional deviation due to the dispersion of the shrinkage of the thick film wiring substrate 1 can be absorbed by setting the diameter of the via portion 3 to a large diameter (about 500 .mu.m), and the bad connection can be prevented.
Further, Japanese Patent Application JP-A-61-22691 discloses a circular metal pad 8 of palladium or the like having a diameter of about 1 mm and a thickness of about 3 .mu.m which is formed on the surface of an upper end portion of the via portion 3 while maintaining the diameter of the via portion 3 to 150 to 200 .mu.m. In this case, as shown in FIG. 3, the circular metal pad 8 is formed so that the positional deviation due to the dispersion of the shrinkage of the thick film wiring substrate 1 can be absorbed and the bad connection can be prevented.
Recently, LSI's progress rapidly with high function and high density, and a pitch between terminals and a diameter of the terminal of the LSI in the present state are in the order of about 450 .mu.m and 200 .mu.m, respectively. In order to achieve such a high density, it is necessary to fabricate not only the upper thin film circuit but also the thick film circuit with high density. However, the conventional substrate has drawbacks as described below. That is, since the diameter of the via portion 2 is enlarged to about 0.5 mm in the example shown in FIG. 2 and the diameter of the circular metal pad on the thick film substrate is further enlarged to 1 mm as compared with the diameter of the via portion, it is difficult to fabricate the multilayer substrate with high density and high yield. It is not allowable to enlarge the diameter of the via portion to about 0.5 mm or enlarge the diameter of the circular conductor on the thick film substrate to 1 mm in the fabrication of the thick film circuit with higher density. It is impossible to fabricate the substrate with high density if the dimension of the diameters is not maintained to the present state or is reduced further. However, if the diameter of the via portion or the circular metal pad is reduced, it is obvious to increase the bad connections.